1. Field of the Invention
The present invention relates to microprocessor systems comprising a memory which includes means for effecting page mode data writing and, and more particularly, to such microprocessor systems for incorporation in an integrated circuit embedded in a plastic card which is used, for example, for personal identification with an ATM (automatic teller machine), wherein the memory is preferred to be an EEPROM (electrically erasable and programmable read-only memory).
2. Description of the Prior
Recently, IC (integrated circuit) cards, i.e., plastic cards incorporating an IC chip or chips for storing information which are utilized, for example, for personal identification with an ATM, are becoming widely used. Among them, those incorporating a microprocessor and a PROM (programmable read-only memory), or an EEPROM (electrically erasable and programmable read-only memory) in particular, are attracting wide attention because non-volatile data can be written into them without detaching the memory from the circuitry. The speed of writing data into such a memory can be enhanced considerably by adopting the page mode of writing in which a plurality of bytes are written into a page, i.e., a block of byte locations in the memory cell array, in one write cycle of the microprocessor. In other words, the memory cell array is divided into pages each consisting of a same number of bytes, each byte consisting, for example, of 8 bits.
The conventional page mode of writing data into a PROM is effected as follows. First, in a so-called exterior writing operation, a sequence of the data bytes corresponding to a page of the memory cell array is latched in a data latch within the PROM circuit. Next, after the latching of all the data bytes corresponding to a page is finished, a so-called interior writing operation is effected. Namely, the data bytes are transferred from the data latch t byte locations having corresponding addresses in a page of the memory cell array.
Generally, two methods are used today to switch from the exterior writing to the interior writing operation. According to the first of the two methods, a sequence of consecutive data bytes 1 through N are latched in the data latch of the PROM during a predetermined fixed length time interval Tewc measured from the time point at which the latching of the first byte (byte 1) of the sequence is commenced, as shown in FIG. 1. Then, at the end of the time interval Tewc, the PROM automatically switches from the exterior to the interior write operation, to finish one write cycle consisting of an exterior and an interior write cycle Tewc and Tiwc. According to the second method, a maximum or an upper limit Tewcmax is set with respect to the time interval Tewc during which the data bytes are latched in the data latch, and the PROM automatically switches from the exterior to the interior writing operation when the time interval Tewc exceeds the predetermined upper limit Tewcmax.
Conventional devices as described above have following disadvantages. Namely, an operation may be performed which is apparently the writing of data, but is the writing of erroneous data into a PROM which has a page mode writing function. The error may be due, for example, to bad contact of the I/O of the IC card and the ATM terminal, a malfunction of the CPU, or an uncontrolled running of a program in the CPU. In any event, the data latched in the data latch are automatically written into the interior memory cell array.